Having some fun with FPGAs
The goal of this pages is to keep a little reference of some initial experiments I did in the wonderful world of FPGAs, VHDL, IP and other magical things for mere C developers like me. I do not claim that any information on these pages is correct or even useful, they only serve as a reference, and perhaps a log of some 'first steps'.
A word on hardware, tooling and work method
At the time that these pages were started (april 2007) Altera released a so called Nios II Embedded Evaluation Kit, Cyclone III edition
. This kit looks like this:
Which was at the time sold for 399$. Given the fact that I'm doing this for fun, the development kit was already sufficiently expensive I will try to use the web edition version of the Altera tooling. These pages will not go in depth on how to use Quartus, Modelsim, the NIOS IDE nor the programmer. All tools are shipped with enough documentation to get you familiar with the interface. I will mainly focus on the fun part and besides, tools are more likely to change than ideas. The main advantage of this page is that my first steps are logged, which means the discoveries
(if any :D) will be logged. So it is advised to read these pages in a depth first∞
fashion. I will go in depth on the hardware present on the board when I need to.
And remember, the main reason for these pages is not to be formally correct, provide a course in VHDL, nor to shock the world, the main reason is to have some fun
An overview of fun